Integrated circuits (IC) including highly integrated devices such as a system-on-chip (SOC) devices, for example, commonly use the last metal layer of the device (e.g., often the top level of the device during manufacturing) for formation of terminals or connections for the device. This last metal layer becomes an interconnect layer for temporarily or permanently interconnecting the IC with other carriers, printed circuit boards, systems, or components. For example, contact pads for wafer testing, terminals for wire bonding, and contact bumps for “flip chip” connections are often implemented as part of the same last metal interconnect layer.
In many cases the last metal interconnect layer is comprised of an aluminum alloy, copper, or like materials. For some processes, such as wafer testing for example, a metal alloy is a preferred material for contact formation. For other processes, such as flip chip contact bumps for example, copper is a preferred material to form the contacts upon. However, in general one material or another is used for the interconnect layer, for all of the contact types. Consequently, manufacturers often experience some trade-offs in selecting the final interconnect layer material.
In other cases, the top metal layers can be used for power distribution. To increase the current capability, the upper layers can be formed to be thicker than the lower layers, for example. This can result in wide design rules to connect the bottom layers to the top layer. In the case of a system-in-package (SIP) configuration, for instance, many signal pins may be connected directly to the lower level metal layer from the upper or top layer. This enables a more direct signal path and can allow for improved design rules in the top layer(s) for lateral routing between interconnect bumps. Such a configuration can support an increased current capability within the SIP.